Jan Yin Chan Electronics Co.,LTD. 386SX Single Chip PC
M6117D : System on a chip
DM&P
Jan Yin Chan Electronics Co,. LTD. M6117D 386SX Single Chip PC Page 79
8F-1,No.22,Wuchyuan 2RD.,Hsin Chuang city Taipei Hsien, Taiwan, R.O.C. Tel: 886-(02) 2298-0770 Fax: (02) 2299-1883
Section 6 : Timing Diagrams
(A) P9 Non-pipelined Read... Inactive .... 3 waits................................................................................78
(B) P9 Non-pipelined Write... Inactive ... 2 waits.................................................................................79
(C) P9 Non-pipelined Read... Miss ... 4 waits......................................................................................80
(D) P9 Non-pipelined Write... Miss ... 3 waits......................................................................................81
(E) P9 Non-pipelined Read... Hit ... 1 wait...........................................................................................82
(F) P9 Non-pipelined Write... Hit ... 1 wait...........................................................................................83
(G) P9 Pipelined Read... Inactive ... 2 waits........................................................................................84
(H) P9 Pipelined Read ... Miss ... 3 waits ............................................................................................85
(I) P9 Pipelined Write ... Miss ... 2 waits..............................................................................................86
(J) P9 Pipelined Read ... Hit ... 0 wait..................................................................................................87
(K) P9 Pipelined Write... Without Fast Write Hit ... 0 wait ...................................................................88
(L) P9 Pipelined Read Hit after Write Hit ... Add 1 wait.......................................................................89
(M) P9 Pipelined Write Hit ... with Fast Write Hit... 1 wait ...................................................................90
(N) P9 Pipelined Read Hit after Fast Write Hit ... 0 wait......................................................................91
(O) Waveform of Disabling DRAM controller.......................................................................................92
(P) Bank Miss for EDO DRAM Timing.................................................................................................93
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