Jan Yin Chan Electronics Co.,LTD. 386SX Single Chip PC
M6117D : System on a chip
DM&P
Jan Yin Chan Electronics Co,. LTD. M6117D 386SX Single Chip PC Page 17
8F-1,No.22,Wuchyuan 2RD.,Hsin Chuang city Taipei Hsien, Taiwan, R.O.C. Tel: 886-(02) 2298-0770 Fax: (02) 2299-1883
b. I/O trap events : VGA device access
harddisk device access
line-printer device access
General I/O port access
General memory ports access
c. External device events : IRQ active
DRQ active
Input devices active
External suspend-switch
RTC alarm
SMI setup-switch
d. Software SMI event
3.17.2 APM
The APM (Advanced Power Management interface)
creates an interface to allow the OS to communicate with
the SMM code. The M6117D provides the configuration
index 56H bit 6 to generate the software SMIJ signal for
APM applications.
3.18 16 bits GPIO +16 sets of GPI/O power control
signals
In additiion to 16 independent GPIOs , the M6117D
provides 16 expandable GPOs and 16 expandable GPIs.
The user can program at most 322 signals to control
power, flash disk, IDE, LED… and so on application for
peripheral devices. Please refer to Section 4.9.
3.19 WATCH DOG timer
The M6117D has watchdog timer function for monitoring
whether the system is still work or not after a period of time.
If the system happened some error or hanged up, it cause
the timer timed out, then a system reset or NMI or IRQ may
happen decided by BIOS programming. The
WATCHDOG timer source is 32.768 Khz frequency to
counter a 24 bits counter such that the timer range is from
30.5 usecs to 512 secs with resolution 30.5 usecs. Please
refer to Section 4.10 .
3.20 IDE decoder interface
The M6117D adds IDE decoder interface for PIO mode
signal. It provides one channel connected with external
HDD by decoding SA[15:0] with two kinds of channel
selectable.
HDCS0J HDCS1J
primary channel 1F0 - 1F7 3F6
secondary channel 170 - 177 376
Section 4 : Configuration Registers
4.1 How to read/write to configuration registers
The read/write configuration register is the first index to be
processed. On board I/O port 22h is the index register and
I/O port 23h is the data register. To read a configuration
register, write the index value to I/O port 22h in advance,
then read data from I/O port 23h. To write a configuration
register, write the index value to I/O port 22h, then write
data to I/O port 23h. For instance, if we want to read the
data of configuration register which index is 10h, the steps
are :
1) Write 10h (index) to I/O port 22h
2) Read data from I/O port 23h
If we want to write data 55h to configuration register which
index is 12h, then the steps are :
1) Write 12h (index) to I/O port 22h
2) Write data 55h to I/O port 23h
*The steps of locking/unlocking the configuration
registers :
OUT 22h, 13h (Enable 13h)
OUT 23h, C5h (Unlock)
OUT 22h, XXh (XX = Configuration Index)
OUT 23h, YYh (YY = Configuration data)
OUT 22h, XXh
OUT 23h, YYh (Configuration can be written
repeatedly)
:
OUT 22h, 13h (Enable 13h)
OUT 23h, 00h (Lock)
4.2 Hardware Power-On setup
Refer to Section 2.5 Hardware power on setup table.
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