DMP Electronics eBOX-3350MX-AP Manual do Utilizador descarregar pdf (Página 45)

386SX Single Chip PC Jan Yin Chan Electronics Co.,LTD.

DM&P M6117D : System on a chip

Page 44

Jan Yin Chan Electronics Co,. LTD. M6117D 386SX Single Chip PC

8F-1,No.22,Wuchyuan 2RD.,Hsin Chuang city Taipei Hsien, Taiwan, R.O.C. Tel: 886-(02) 2298-0770 Fax: (02) 2299-1883

INDEX 18H

default F0H

Bit Description

7~4 ISA high speed memory address

mask A[15-12] set 1

3~0 ISA high speed memory address

A[15-12] set 1

INDEX 19H

default 00H

Bit Description

7~4 ISA high speed memory address

A[23-20] set 2

3~0 ISA high speed memory address

A[19-16] set 2

INDEX 1AH

default FFH

Bit Description

7~4 ISA high speed memory address

mask A[23-20] set 2

3~0 ISA high speed memory address

mask* A[19-16] set 2

INDEX 1BH

default F0H

Bit Description

7~4 ISA high speed memory address

mask* A[15-12] set 2

3~0 ISA high speed memory address

A[15-12] set 2

INDEX 1CH

default 00H

Bit Description

7~4 ISA high speed I/O address

A[9-6]

3~0 ISA high speed I/O address

A[5-2]

INDEX 1DH

default FFH

Bit Description

7~4 ISA high speed I/O address

mask* A[9-6]

3~0 ISA high speed I/O address

mask* A[5-2]

* Mask Bit = 1 : Compare this address bit.

0 : Do not compare this address.

INDEX 1EH

default 00H

Bit Description

7~3 reserved

2~0 ATCLK1 Definition

High Freq. ATCLK[2:0] Normal Freq.

14.318/2 0 0 0 14.318/2

PCLK2/2 0 0 1 PCLK2/3

PCLK2/3 0 1 0 PCLK2/4

PCLK2/4 0 1 1 PCLK2/5

PCLK2/5 1 0 0 PCLK2/6

PCLK2/6 1 0 1 PCLK2/8

PCLK2/8 1 1 0 PCLK2/10

PCLK2/10 1 1 1 PCLK2/12

INDEX 20H default 80H

Bit Description

7 DRAM controller

0 : disable

1 : enable

6 reserved

5~4 Allocation remapping when SMI

occurs, D3 must be enabled except

remapping to ROM area

0 0 : Remap to ROM area

0 1 : Remap to page A,B

1 0 : Remap to page E

1 1 : Remap to page F

3 Remap SMI routine to local memory

when this bit is set to high

2 Write to Flash ROM

0 : disable

1 : enable

1 DRAM self refresh (Index 10h D[1]

must be 1)

0 : disable

1 : enable

0 Force ROM area remapping, disable

remapping SMI routine to A, B page

in local memory when this bit is set to

high.

1 2 ... 40 41 42 43 44 45 46 47 48 49 50 ... 111 112

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