DMP Electronics eBOX-3350MX-AP Manual do Utilizador descarregar pdf (Página 20)

Jan Yin Chan Electronics Co.,LTD. 386SX Single Chip PC

M6117D : System on a chip

DM&P

Jan Yin Chan Electronics Co,. LTD. M6117D 386SX Single Chip PC Page 19

8F-1,No.22,Wuchyuan 2RD.,Hsin Chuang city Taipei Hsien, Taiwan, R.O.C. Tel: 886-(02) 2298-0770 Fax: (02) 2299-1883

4.3.3 DRAM timing control

(a) Memory write access time insert wait

CASJ precharge time (high time) will last for one more T-cycle before its falling edge if D[7] of index 11h is set to high.

BCLK2

MA

RASJ

CASJ

WEJ

COL

ROW COL address

Insert wait 1T

(b) Memory CAS read access time insert wait

When memory read cycles. CASJ active time (low time) will last for one more T-cycle before its rising edge if D[6] of

index 11h is set to high.

BCLK2

MA

RASJ

CASJ

WEJ

COL ROW addr COL address

Insert wait 1T

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